In computing, a bus is a way of communicating data in between components inside a computer or in between computers. It can be implemented via hardware, software, or both. It’s typically a shared physical pathway made of wires and circuits that allow multiple devices to communicate managed by a software communication protocol that manages which device can transmit data at a given time.

Examples

One such example that might be familiar to you if you’ve built a desktop before, is a PCIe bus, which is a specialized connection that is used to most commonly connect graphic cards to the rest of the machine. Another even more obvious examples are Universal Serial Buses, or USBs. Modern buses use both serial and parallel communication to maximize the speed and efficiency of data transfer.

There are different types of buses based on the purpose they serve. Some of the most common ones are memory buses and I/O buses. In some computer architecture systems, they will be represented as a single shared bus, but in more modern architectures we have separate specialized buses.

Memory Bus

A memory bus is a type of bus that is specialized in transferring large amounts of data as quickly as possible. It is dedicated to interfacing with RAM.

I/O Bus

The I/O bus is dedicated to interfacing with input and output devices. This can range from mice, keyboards, to SSDs, graphic cards and so on.

Composition

Non-testable

The composition of buses is not within the scope of CPSC 213. It’s kinda neat though.

Both buses are composed of the following three sub-components.

Address Bus

An address bus sends a memory address from the CPU to memory. It is generally unidirectional.

Data Bus

A data bus sends the actual data or instruction to and from memory. It is generally bidirectional.

Control Bus

A control bus carries commands from the CPU to other devices, and status messages back from other devices. It also carries interrupts. It is generally bidirectional.

Optimizations

Another optimization in this field is direct memory access, which makes it so that devices and memory can exchange data without any CPU intervention whatsoever.